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Silicon Labs /Series0 /EFM32LG /EFM32LG942F64 /USART0 /IRCTRL

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Interpret as IRCTRL

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31282724232019161512118743000000000000000000000000000000000000000000 (IREN)IREN0 (ONE)IRPW0 (IRFILT)IRFILT0 (PRSCH0)IRPRSSEL0 (IRPRSEN)IRPRSEN

IRPRSSEL=PRSCH0, IRPW=ONE

Description

IrDA Control Register

Fields

IREN

Enable IrDA Module
IRPW

IrDA TX Pulse Width

0 (ONE): IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1

1 (TWO): IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1

2 (THREE): IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1

3 (FOUR): IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1
IRFILT

IrDA RX Filter
IRPRSSEL

IrDA PRS Channel Select

0 (PRSCH0): PRS Channel 0 selected

1 (PRSCH1): PRS Channel 1 selected

2 (PRSCH2): PRS Channel 2 selected

3 (PRSCH3): PRS Channel 3 selected

4 (PRSCH4): PRS Channel 4 selected

5 (PRSCH5): PRS Channel 5 selected

6 (PRSCH6): PRS Channel 6 selected

7 (PRSCH7): PRS Channel 7 selected
IRPRSEN

IrDA PRS Channel Enable

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data